Breach! Chinese Scientists Achieve Progress in Ferroelectric Multivalued Memory

Recently, the Shenyang National Research Center for Materials Science of the Institute of Metals of the Chinese Academy of Sciences (hereinafter referred to as the Institute of Metals) has cooperated with a number of domestic institutions. The research team has vertically assembled metal oxide semiconductor field effect transistors (MOSFETs) and non tunneling ferroelectric memristors by designing a special energy band alignment between two-dimensional semiconductors and two-dimensional ferroelectric materials, Two dimensional ferroelectric memory based on vertical architecture and programmable gate voltage is constructed for the first time.

It is understood that two-dimensional nano electronic devices based on vertical structures have become an important research direction to continue Moore's Law. So far, the research on ferroelectric 2D material memristors is still lacking, especially the research on memristors with vertical configuration and adjustable gate voltage. The main reason is that it is difficult for traditional 2D memristors based on tunneling architecture to have higher performance and effective gate regulation characteristics in the vertical direction.

To this end, the research team used the two-dimensional layered material CuInP2S6 as the ferroelectric insulator layer, and the two-dimensional layered semiconductor material MoS2 and multilayer graphene as the upper and lower electrode layers of the ferroelectric memristor, respectively, to form a metal/ferroelectric/semiconductor (M-FE-S) structure memristor; At the same time, MOSFET architecture is introduced by stacking multilayer h-BN as the gate dielectric layer above the top semiconductor layer. The bottom M-FE-S memristor device has a switching ratio of more than 105 and long-term data storage capability, and its resistive behavior is strongly coupled with the ferroelectricity of CuInP2S6 layer.

In addition, the researchers prepared 3 × 4, which shows the feasibility of this type of ferroelectric memristor device applied to storage cross array. The researchers further controlled the carrier concentration (or Fermi level) of the two-dimensional semiconductor layer MoS2 effectively by applying grid voltage to the upper MOSFET, thus controlling the storage performance of the lower M-FE-S memristor. Based on the above results, the researchers demonstrated the storage characteristics of the gate voltage adjustable multi resistance state of the device.

The ferroelectric memristor with programmable gate voltage displayed in the research is expected to play an important role in future neural morphology computing systems such as artificial synapses, and may lead to the development of multifunctional devices based on two-dimensional ferroelectric materials. In addition, the vertical integration architecture of MOSFET and memristor proposed in this work can be further extended to other two-dimensional material systems to obtain new memories with better performance.