TSMC, Gexin, and Samsung joined Imec's "Sustainable Semiconductor Technology" researc

The Belgian Microelectronics Research Center (Imec) has announced that semiconductor giants such as TSMC, Global Foundries, and Samsung have joined its Sustainable Semiconductor Technology and Systems (SSTS) research program. The SSTS program was launched in 2021, gathering key players from the entire semiconductor industry, including system vendors, equipment suppliers, and the latest three international wafer fabs, to assist in reducing the ecological impact on the chip value chain.




Imec pointed out that in response to the rising awareness of climate change, technology companies around the world are accelerating their supply chains and products to achieve carbon neutrality. The semiconductor industry is aware of its crucial role in it. Industry data shows that nearly 75% of the carbon dioxide emissions generated by mobile devices can be traced back to their processes, while chip processes account for nearly half of their carbon footprint. On this premise, the SSTS plan provides detailed information on environmental impacts for various technological stages of the semiconductor industry.




Luc Van den Hove, CEO of Imec, stated that the success of the SSTS program depends on the active participation of the overall IC value chain members. Therefore, we are pleased to announce that TSMC, Grimm, and Samsung have now joined this program, as well as the new partner of the core program, Rawus, who recently joined well-known system vendors such as Amazon, Apple, Meta, and Microsoft, as well as device vendors such as Applied Materials, ASML, Edwards Vacuum, KURITA, SCREEN, and Tokyo Electric. This plan has been recognized by global wafer fabs and has set an important milestone in successfully consolidating the entire semiconductor ecosystem.




SSTS program host ke Ragnarsson added that by benchmarking our models at TSMC, Grid Core, and Samsung, we will be able to further improve and optimize the imec.netzero simulation platform in the future. This network application is the core of the SSTS program, allowing us to evaluate energy consumption, water/mineral use, and greenhouse gas emissions related to various aspects of chip manufacturing. In the long run, this cooperation plan can also propose innovative processes and optimization technologies, thereby developing suggested solutions that can reduce the ecological footprint of chips.


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