After decades of development, semiconductor process technology has gradually approached the sub nanometer physical limit, making it difficult for traditional silicon-based integrated circuits to continue Moore's Law by further reducing the in-plane size of transistors. The development of multi-layer interconnect CMOS logic circuits with vertical architecture to achieve breakthroughs in three-dimensional integration technology has become a new direction actively explored in the international semiconductor field.

Due to the modern technology of silicon-based transistors using ion implantation on the surface of monocrystalline silicon, it is difficult to achieve re growth or transfer of monocrystalline silicon above a layer of ion implanted monocrystalline silicon. Although integration can be improved by connecting electrodes, chips, and other methods in three-dimensional space, the critical transistor is always limited to the bottom layer of the integrated circuit and cannot obtain the degree of freedom in the thickness direction. New materials or disruptive principles have therefore become important breakthrough points of great concern.

Recently, Zhou Wu, a professor of the University of Chinese Academy of Sciences, cooperated with Han Zheng, a professor of Shanxi University, Wang Hanwen, an associate researcher of Liaoning Materials Laboratory, Hou Yanglong, a professor of Sun Yat sen University, and Li Xiuyan, a researcher of the Institute of Metal Research of the Chinese Academy of Sciences, to propose a new p-type doped two-dimensional semiconductor method based on interface coupling.

This method adopts a disruptive approach of interface effect, with simple process, stable effect, and can effectively maintain the excellent performance of two-dimensional semiconductors. On this basis, the research team used vertical stacking to prepare complementary logic gate NAND and SRAM devices composed of 14 layers of van der Waals materials and containing 4 transistors

According to the "University of the Chinese Academy of Sciences", this research achievement has broken the bottom "seal" of silicon based logic circuits, and obtained three-dimensional (3D) vertically integrated multilayer complementary transistor circuits based on quantum effects, providing ideas for the development of two-dimensional semiconductor devices in the future in the post Moore era. At present, the new achievement in the semiconductor field led by Chinese scientists has been published in the journal Nature.