According to the Department of Integrated Circuits at Xi'an University of Electronic Science and Technology, Professor You Hailong and Professor Li Cong's research group have made a series of new progress and important academic achievements in the field of hardware simulation compilation in EDA.

This research achievement has been successively accepted and published in IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD, CCF Class A) and top international conferences in the EDA field (ICCAD, DATE). It is the first paper accepted by ICCAD conference as the first author unit by the university. The related research work has received funding from the National Natural Science Foundation of China, Huawei Technologies Co., Ltd., Shanghai Silxin Technology Co., Ltd. and other school enterprise cooperation projects, and the related achievements have been applied to the research and development of hardware simulators in China.

It is reported that hardware simulators (EMUs) have been continuously developing since their inception due to their unique advantages in capacity, performance, and tunability. They have become a fundamental EDA tool in simulation verification and are leading the continuous innovation of chip verification technology.

Hardware compilation technology is the key to the development of hardware simulators. The research group has innovatively proposed a circuit partitioning framework for multi FPGA systems and processor scheduling drivers in the field of solving the classic N-P difficult problem of hypergraph partitioning in EMUs using two technical routes: FPGA and dedicated CPU. The framework has achieved efficient optimization of hypergraph partitioning on a scale of billions, and has achieved a series of results.