Recently, Chip Journal officially released the "Top 10 Advances in Chip Science in China 2023". It is reported that Chip Journal is jointly published by Shanghai Jiao Tong University and Elsevier Group. It is the only comprehensive international journal in the world that focuses on chip research. It has been selected for the "China Science and Technology Journal Excellence Action Plan High Starting Point New Journal Project" jointly implemented by the China Association for Science and Technology, Ministry of Education, Ministry of Science and Technology, Chinese Academy of Sciences and other units, and is one of the "three types of high-quality papers" encouraged by the Ministry of Science and Technology.

The selection of the "Top Ten Advances in China's Chip Science in 2023" aims to pay tribute to and inspire the scientific enthusiasm and dedication of chip workers in China, enhance the public attention to cutting-edge chip research in China, and promote the process of chip localization. 32 items were selected from 50 achievements and voted online by 150000 people, ultimately resulting in nominations for the "Top 10 Advances in CHIP China Chip Science" and the "Top 10 Advances in CHIP China Chip Science".

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Chip 2023 Top Ten Advances in Chinese Chip Science

In memory computing design for machine vision correction: a hybrid domain polynomial accelerator based on a 40 nm RRAM multi-core chip

The team led by Academician Huang Ru and Professor Cai Yimao from Peking University has proposed for the first time a hybrid domain ternary multiplication acceleration strategy based on resistance variable memory arrays, which efficiently matches the Horner polynomial acceleration algorithm. The team developed a multi-core high-order polynomial matrix vector computing chip system based on the standard 40 nm CMOS platform using resistive switching memory, which achieved lens distortion calibration with calibration results comparable to professional software. This demonstrates the potential application of in memory computing based on resistive switching memory in optical distortion correction systems.

The research team of Professor Chai Yang from The Hong Kong Polytechnic University has successfully developed a biomimetic insect optoelectronic chip that utilizes a fusion of perception and computation to process dynamic visual information, achieving efficient perception and processing of dynamic visual information with minimal resources. This study successfully simulated the response characteristics of cascade neurons in insect visual systems using molybdenum disulfide phototransistors with shallow defect energy levels, which can effectively fuse encoded temporal and spatial information. This achievement will bring significant value to scenarios such as autonomous driving, unmanned aerial vehicle systems, and augmented reality.

A fully analog optoelectronic intelligent computing chip with billions of computing power

The team led by Academician Dai Qionghai from Tsinghua University has proposed a purely analog optoelectronic fusion computing chip. For the first time internationally, optoelectronic computing has been tested at the system level, achieving over 3700 times the computing power of top GPUs and over 4.9 million times the energy efficiency. This proves the superiority of photon computing in many AI tasks and opens up a series of broad application prospects in the post Moore's Law era.

28nm in memory computing macrocell based on RRAM

Liu Ming, academician of the Institute of Microelectronics of the Chinese Academy of Sciences, and Dou Chunmeng, a researcher team, proposed a mixed weighted two transistor - memristor cell in memory computing macro circuit design, and used the domestic 28nm embedded RRAM process platform with independent intellectual property rights of the research team to perform streaming, which effectively suppressed the non ideal factors of RRAM cells and arrays, realized multi bit analog in memory computing with high energy efficiency, high parallelism and high accuracy, and provided a new idea for realizing the memory computing integration edge AI acceleration chip.

The first integrated two-dimensional fin transistor with epitaxial high kappa gate dielectric

Professor Peng Hailin's research team at Peking University has achieved the world's first epitaxial growth of a two-dimensional semiconductor fin/high kappa gate oxide heterojunction array and heterogeneous integration of its three-dimensional architecture, and developed high-performance two-dimensional fin field-effect transistors. This work solves the problem of precise synthesis of two-dimensional semiconductors/high kappa gate dielectrics and three-dimensional heterogeneous integration, breaking through the key bottleneck of two-dimensional semiconductor applications in high-performance and low-power chips, and bringing new opportunities for the development of future chips.

Ultra low loss quantum chip interconnection

The research team of Academician Yu Dapeng from Southern University of Science and Technology has made breakthrough progress in distributed quantum computing research. The team has significantly reduced the loss of quantum chip interconnection to the level of a single chip through a series of technological innovations, making it possible to scale up distributed quantum computing on a large scale. Using this technology, the research team has achieved the interconnection of five quantum chips, forming a 20 bit distributed superconducting quantum processor. Through more cross chip quantum state transfers and logic gate operations on a single chip, a maximum entangled state of 12 bits across three chips was ultimately achieved.

A fully integrated neuromorphic memristor chip for edge learning

The research team led by Professor Wu Huaqiang and Professor Gao Bin from the School of Integrated Circuits at Tsinghua University has creatively proposed a new general algorithm and architecture for adapting memristor memory computing integration to achieve efficient on-chip learning based on the paradigm of integrated computing. This effectively realizes the single-chip three-dimensional integration of large-scale analog memristor arrays and CMOS. Through the full process collaborative innovation of algorithms, architecture, and integration methods, the world's first fully integrated memristor memory computing integrated chip that supports efficient on-chip learning has been developed.

Controllable preparation of wafer level two-dimensional van der Waals superconducting heterojunctions

Professor Gao Libo's team from Nanjing University and Associate Professor Lin Junhao's team from Southern University of Science and Technology have made breakthrough progress in the wafer level growth and mechanism research of two-dimensional van der Waals superconducting heterojunctions. This achievement proposes a new growth strategy from high to low, achieving layer by layer stacking growth of two-dimensional van der Waals heterojunctions, greatly demonstrating the flexibility of van der Waals heterojunctions, and for the first time, constructing two-dimensional superconducting Josephson junctions in wafer level samples, laying the foundation for the realization of multifunctional devices and the development of quantum devices.

Ballistic 2D transistor beyond silicon-based limits

The team led by Academician Peng Lianmao and Researcher Qiu Chengguang from Peking University has constructed a 10 nm ultra short channel ballistic two-dimensional indium selenide transistor. They have innovatively proposed the "rare earth element yttrium induced two-dimensional phase transition theory" and invented the "atomic level controllable precise doping technology", breaking the engineering limitations of traditional ion implantation. This has successfully overcome the international problem of gold semiconductor contact in the two-dimensional field and achieved the fastest and lowest energy consumption two-dimensional semiconductor transistor in the world to date.

The huge electric heating effect in interface enhanced ferroelectric polymers

Professor Qian Xiaoshi's team at Shanghai Jiao Tong University has developed a polymer topological interface epitaxy technology, which induces the widespread formation of polymer polarization interfaces through sacrificial layers of small molecule crystals. This enables ferroelectric polymers to exhibit huge entropy changes under external electric fields, achieving the Poincar effect in traditional fluorinated ethylene based relaxor ferroelectric polymers, and revealing the entropy change mechanism of topological epitaxy polarization interfaces under external electric field regulation. This work can further reduce the size and weight of the power supply, providing power for potential portable electric card cooling devices.

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Nomination Award for Top 10 Advances in Chip Science in China in 2023

Two dimensional semiconductor contacts approaching quantum limits

The teams of Professor Wang Xinran and Professor Shi Yi from Nanjing University and Professor Wang Jinlan from Southeast University have proposed a new strategy for enhancing orbital hybridization, achieving the lowest contact resistance of 42 Ω·μ m in a single-layer MoS2 transistor, which is lower than silicon-based devices for the first time and close to the theoretical quantum limit. This work has overcome the problem of ohmic contact in two-dimensional semiconductors and solved one of the key bottlenecks in the application of two-dimensional semiconductors in high-performance integrated circuits.

Zero carbon, high-performance thermal switch functional device

Professor Liu Chenhan's team from Nanjing Normal University, Professor Chen Zuhuang's team from Harbin Institute of Technology (Shenzhen), and Professor Chen Yunfei's team from Southeast University have proposed a new mechanism to actively regulate thermal transport, combining antiferroelectric ferroelectric reversible phase transition with thermal regulation. They have successfully developed a new type of high-efficiency antiferroelectric thermal switch prototype device with high thermal switching ratio, fast response speed, low regulation voltage, and long working life, filling the gap in the research field of domestic ferroelectric thermal switches and enhancing the international discourse power and national competitiveness in the field of thermal regulation.

New type of polariton "phototransistor"

The research team led by Dai Qing from the National Center for Nanoscience and Technology proposed a new idea of using polaritons as optoelectronic interconnect media, fully leveraging their advantages of high light compression and easy regulation. They designed and constructed micro nano scale graphene/molybdenum oxide van der Waals heterojunctions, achieving the function of "phototransistors" that use one polariton to regulate another polariton switch. This work provides a new path for building highly integrated optoelectronic fusion chips

Phase synchronized reconfigurable Moir é nanolaser

Professor Ma Renmin's research team at Peking University has achieved, for the first time internationally, a reconfigurable coherent nanolaser array, breaking through the limitation that nanolasers can only achieve coherent laser emission in a single or fixed array. This is the first time that reconfigurable coherent control of nanolaser arrays has been achieved, which is a key step in nanolaser physics and devices. It not only has important guiding significance for achieving reconfigurable functions in other active systems, but also lays an important foundation for the practical application of nanolasers.

Reconfigurable digital storage and computing integrated AI chip

The research team led by Professors Yin Shouyi and Wei Shaojun from Tsinghua University, as well as Professor Tu Fengbin from the Hong Kong University of Science and Technology, proposed a reconfigurable digital storage and computing integrated architecture and designed the world's first storage and computing integrated AI chip ReDCIM for general cloud high computing scenarios. For the first time, this chip supports high-precision floating-point and integer calculations on a storage computing integrated architecture, which can meet the intelligent application needs of various scenarios such as cloud AI inference and training at the data center level. This architectural paradigm lays the technical foundation for breaking through the bottleneck of the "storage wall" of artificial intelligence chips.

Independently developed 41 bit "Zhuangzi" one-dimensional superconducting quantum chip

The research team of Fan Heng, Xu Kai and Zheng Dongning from the Institute of Physics of the Chinese Academy of Sciences independently developed a 41 bit one-dimensional superconducting quantum chip, designed various examples of diagonal Aubry Andr é Harper (AAH) model with up to 41 qubits, and successfully simulated the energy spectrum of the famous "Hofstadter butterfly" and various novel topological zero modes by using dynamic spectrum technology experiments. A universal hybrid quantum simulation method was established to explore quantum topological systems in the NISQ era using a superconducting quantum processor assisted by highly controllable Floquet engineering.

Application of Hardware Physical Entropy Source Based on Spatiotemporal Changes of Memristors in Cryptography Research

The research team led by Liu Bo from Beijing Institute of Technology reported a random number generator based on the spatiotemporal fluctuations of memristors as the physical entropy source. Researchers have verified the randomness and independence of the spatiotemporal fluctuations of memristors as entropy sources, and opened up a new method for analyzing inter device fluctuations using principal component analysis/long short-term memory recurrent neural network analysis of inter device periodic fluctuations, demonstrating the high randomness of random numbers generated based on the spatiotemporal variability of memristors.

New type of integrated sensing, storage, and computing optoelectronic chip

Hu Weida and Miao Jinshui, the research team of the Chinese Academy of Sciences Shanghai Institute of Technical Physics, first put forward a sensing memory computing integrated neural morphology photoelectric detection chip based on the ion electron coupling effect in the world, which simulates the human visual perception function, solves the problem of high delay and high power consumption caused by the separate architecture of the traditional intelligent perception system, and lays a theoretical and device foundation for more large-scale hardware integrated neural morphology visual perception chips.

Preparation and coherent control of multiphoton entangled states based on photonic quantum chips

The research team of Ma Xiaosong, Lu Yanqing, and Zhu Shining from Nanjing University has achieved high-quality preparation, manipulation, and measurement of four photon Dicke states on silicon-based optical quantum chips for the first time based on integrated optics technology. Through on-chip quantum control units, high-precision global coherent control of multiphoton entangled states has been achieved, providing an important foundation for the on-chip preparation and quantum control technology of reconfigurable, multi-body entangled quantum states.

Low size ferroelectric thin film

The research team led by Professor Zhang Linxing and Professor Tian Jianjun from Beijing University of Science and Technology has successfully solved the problem of overcoming the size effect of ferroelectricity. By designing a new layered polar structure material - bismuth oxide with a quasi tetragonal structure, and introducing low-cost chemical epitaxy, the macroscopic performance of 1 nm ultra-thin ferroelectric thin films has been presented, achieving optimal iron polarization at the same scale. This work brings enormous potential for miniaturization and high-quality electronic device manufacturing.